It is now possible to get a real-time view at our scanner visualization in your browser (if you are inside department local network).
The most interesting thing is how the image gets there:
- Data from digitizers is received by the J-PET Controller FPGA
- Lines-Of-Response are reconstructed in real-time
- Regions-Of-Response are calculated into X,Y,Z annihilation coordinates
- Stream of reconstructed points is forwarded from programmable logic through Xillybus to the shared DDR memory
- Petalinux with Ubuntu running on integrated ARM cores accesses the memory and streams the points to your browser by a NodeJS server
It is a next step in the integration of image reconstruction process within the FPGA SoC device. Now, we have a framework on which we can implement further data processing in software.
We are thankful to Bartłomiej Flak and Dr Paweł Rajda from AGH Kraków for their contribution to the J-PET project.
FPGA FAIS 