J-PET Lab – official Opening

Things are getting serious!

Together with the official annoucement of the J-PET Lab opening [link] we are shifting up a gear: there is plenty of FPGA related development, both in low level RTL and HLS. If you are interested, have a look at diploma projects tab or email directly at grzegorz.korcyl@uj.edu.pl

[Visualization by glapska@gmail.com]

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