Hardware Acceleration Lab

FPGAFAIS has become a part of the Hardware Acceleration Lab – a new, cross-department entity at Jagiellonian University, originating from the Strategic Program Excellence Cluster and DigiWorld – one of the priority research area.

Hardware Acceleration Lab gathers experts from various fields connected by computing acceleration such as: GPGPU, FPGA, networking, system design, algorithm optimization.

4 research groups have been formed within the Lab:

Computing Systems: design and development of high performance computing platforms for: general HPC, online data processing infrastructure for large scale physics experiments and 5G

Hardware Acceleration on FPGAs: application of FPGAs for various computing problems for both Edge and Cloud

Programming of novel computer architectures: development and optimization of programming frameworks used for main computing problems, such as AI and simulations

Internet-Of-Things / Edge-Computing: technology and algorythmics for autonomous vehicles, sensors fusion and Edge-AI

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