Congratulations to Mateusz Guzik for receiving a prize for the best master thesis at the Faculty of Mechanical Engineering and Robotics AGH University of Science and Technology in Cracow!
Mateusz investigated scrubbing and logic redundancy methods to mitigate radiation induced errors on an image processing pipeline project. Everything on a small #zybo board. This topic was especially important to Mateusz as he is a member of AGH Space Systems #aghspace – a very strong group developing space-related technologies.
You can find the awarded thesis in the Results section
FPGAFAIS has become a part of the Hardware Acceleration Lab – a new, cross-department entity at Jagiellonian University, originating from the Strategic Program Excellence Cluster and DigiWorld – one of the priority research area.
Hardware Acceleration Lab gathers experts from various fields connected by computing acceleration such as: GPGPU, FPGA, networking, system design, algorithm optimization.
4 research groups have been formed within the Lab:
Computing Systems: design and development of high performance computing platforms for: general HPC, online data processing infrastructure for large scale physics experiments and 5G
Hardware Acceleration on FPGAs: application of FPGAs for various computing problems for both Edge and Cloud
Programming of novel computer architectures: development and optimization of programming frameworks used for main computing problems, such as AI and simulations
Internet-Of-Things / Edge-Computing: technology and algorythmics for autonomous vehicles, sensors fusion and Edge-AI
ZED Stereo camera from Stereolabs is available for research projects. It can be easily combined with ZCU104 and ZCU102 platforms which are powered by Zynq MPSoCs. The first one even has an example projects with step-by-step instructions for running a demo project.
The camera is used for depth perpection and motion tracking. Check out the video below:
We plan to evaluate this camera in our PET projects for tracking the patient under scan movement and real-time data corrections based on acquired values.
Do you have some free time during holidays and would like to check out how FPGAs work?
That’s great because we announce the summer internships!
From July 17th to August 11th at the Faculty of Physic, Astronomy and Applied Computer Science you can learn about the basics, try to develop some projects and run it on hardware. If you have some ideas but don’t have the hardware or experience you are also welcome.
Start by sending an email to grzegorz.korcyl (at) uj.edu.pl
Congratulations to dr. Paweł Strzempek for defending with distinction! His PhD thesis “Development and evaluation of a signal analysis and a readout system of straw tube detectors for the PANDA spectrometer”.
Today we had a meeting with representants from Digilent and Kamami. After presenting our hardware related activities at Jagiellonian Univeristy we have discussed potential fields for cooperation. Many thanks go to Piotr Warchoł and Karol Farbaniec for participating and presenting Garage of Complexity and Robotics and Artificial Intelligence Students Association.