Couple of weeks ago we have acquired our first Xilinx Alveo U50.
Turns out that setting it up and running first bitfiles easy, especially using Alveo-Pynq and Jupyter notebooks!
It’s only about 15 lines of code to access your accelerator card, configure with a bitfile, allocate memory, transfer data and run the kernel.
Below you can find all links required to configure and operate Alveo cards:
February was a month of very intensive work to prepare our straw detector and Data Acquisition System for tests with proton beam from COSY accelerator at Juelich Forschungszentrum in Germany.
Together with 5 other groups we had granted one week of beamtime to evaluate the detectors, electronics and software.
It was the first time we evaluated operation of the entire, small scale detector system for PANDA experiment. Three detector subsystems: Forward Tracker, Electromagnetic Calorimeter and Time-of-Flight, each with their own readout system, were synchronized with SODANet system and generated data was processed by a set of 3 Compute Node modules for burst building and preliminary preprocessing.
It was also the possibility to test the data preprocessing system based on Xilinx ZCU102 platform. The board receives data streams from the digitizing boards and recovers track candidates, rejecting empty events.
We have successfully managed to construct the first ever mini PANDA DAQ system!
Two subsystems: FT straws and EMC are working together, synchronized by SODANet and processed by Burst Building Network constructed out of 3 Compute Node modules.
First cosmics were collected and tracks reconstructed!
Recently two of our colleagues have defended their thesis based on research involving FPGAs.
The first one: “Particle track recognition on FPGA devices”, by Emilia Pieczonka and
The second one: “Particle track reconstruction on FPGA devices” by Kuba Cierlik
They both are from Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering from University of Science and Technology.
Congratulations!
Brand new Zynq7000 All Programmable SoC ZC706 Evaluation Kit has just arrived!
It’s a powerful set for development of various projects, mainly engaging embedded processor.
Together with SDSoC it opens a new direction for exploring various mechanisms of data processing.
On Monday 2nd of May 2016 we have finished a successfull, two-week beamtime in Forschungszentrum Juelich GmbHÂ for our prototype of Forward Tracker constructed for PANDA (FAIR, Germany).
Great amount of work was needed in order to condition the detector and also for the design and evaluation of its FPGA-based readout system.
The use of TRBv3 hardware together with the software environment for data processing, resulted in very smooth data collection and achievement of low-noise, high-resolution results.
FPGA FAIS 