Tag Archives: FPGA Sympo

III FPGA Symposium – Summary

Thanks to all participants we had a great conference last week! Check out the short summary with handful of interesting stats and links.

  • on training day, a total of 40 participants exercised Intel or Xilinx FPGAs

  • during the symposium day we had 9 talks and 18 demonstrations

    • check the plenary and poster sessions pages for full lists, abstracts and slides
  • over 75 people showed up and up to 30 watched the online stream

  • you can watch the recorded plenary session on youtube at any time using this [link]

  • Poster/demonstration session results:

    • 1st   place: mgr inż. Paweł Jurgielewicz (AGH)

      • Realistic three-dimensional graphics accelerator using Vivado HLS for FPGA devices
    • 2nd place: Patryk Frączek (AGH)

      • Hardware-software vision system for the detection of safe landing sites for UAVs
    • 3rd place:

      • Michał Znaleźniak and Szymon Pulut (UJ)
        • tANS compression system
      • Karol Radwan (AGH)
        • Hardware-software implementation of a SFM module for navigation of UAV
      • Mgr inż. Piotr Rzeszut (AGH)
        • Oscilloscope based on small-size FPGA with VGA display

Congratulations to all participants!

Thanks to KAMAMI and ALDEC for funding the prizes for contestants.

III FPGA Symposium – Update

September has started – it means that the Symposium is approaching. Have a look at couple updates:

  • we will keep the registration opened for two more weeks!

Do not hesitate to register to the event using the form.

  • prizes for the best poster/demonstration

Thanks to our commercial partners Kamami and Aldec the stakes are rising! Prepare your poster or demonstartion to win some nice hardware. Have a look here to find out what you can win and a poster template if you need one.

  • preliminary schedules

Check plenary and poster sessions pages to find out our preliminary schedule and topics that will be covered

 

III FPGA Symposium – Poster Session Prize!

In order to make things more interesting, Aldec has offered to found a prize for the best poster/demonstration!

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We encourage you to take part in the session – prepare a poster or a demostration of your reasearch or project and compete to win the TySOM-1 board.

All Symposium participants will receive voting forms to fill out throughout the session. At the end we will count the points and the board will go to the winner.

Do not hesitate! Register to the event using the form or use the contact form to register your poster.

III FPGA Symposium – Training details

Together with KAMAMI we have fixed the details about the training session during III Symposium.

Please check out the updated training page for a complete program of both courses, organization details and registration forms.

Please note that registration for training through Symposium form IS NOT SUFFICIENT. You have to register additionally by clicking on selected training banner.

III FPGA Symposium – Registration Opening

We are pleased to announce that we have fixed main details of the III Edition of The Symposium on Programmable Logic Devices.

Most importantly:

For more details check the details page.

We will keep updating the program, register soon to receive updates or subscribe to the news feed on the left panel.

II Symposium on FPGAs

Last week, Friday 9th, we had a very successful symposium on FPGAs. It was the second edition of the event started in 2015.

This the day was fill with interesting content. We started with an excursion to Solaris synchrotron and then moved to FAIS for 2 sessions that lasted up to almost 21:00!

Here’s a short summary in numbers:

  • 65 people attended the event
  • 35 people visited Solaris
  • 13 talks were given
  • 8 viewers connected online through twitch.tv
  • 700 tiny sandwiches were eaten throughout the day

I believe next year we can do even better!