Next Tuesday (22 May, 16:00, B-2-50):
- Karol Farbaniec will report on Digilent Design Contest
- Maciej Bendec will report on his research on Neural Networks implementation on FPGAs
- We’ll discuss creation of IEEE Student Branch FPGA and Networking
- We’ll discuss schedule and details of the III Symposium
Today we have run our first full implementation of LSTM neural network on Xilinx Zynq MPSoC ZCU102 platform!
There are 8 hardware accelerators to help the ARM performing successive stages of the network evaluation.
We have achieved over 20x acceleration comparing to pure-software implementation.
The project has been entirely developed in SDSoC environment.